System and method for evaluating power and ground vias in a package design
US7272806B2 · kind B2 · utility
3Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2003 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Mar 21, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and software product evaluate vias in an electronic design. One or more via sufficiency rules are formulated, and then the electronic design is processed to determine whether the vias of the electronic design violate the via sufficiency rules. In the event of a violation, one or more indicators are generated to identify vias that violate the via sufficiency rules. The indicators are visual indicators (e.g., via insufficiency DRCs) on a graphical user interface, and/or a textual report summarizing violations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.