Silicon annealed wafer and silicon epitaxial wafer
US7273647B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2004 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | May 18, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/21
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A silicon annealed wafer having a sufficient thick layer free from COP defects on the surface, and a sufficient uniform BMD density in the inside can be produced by annealing either a base material wafer having nitrogen at a concentration of less than 1×1014 atoms/cm3, COP defects having a size of 0.1 μm or less in the highest frequency of occurrence and no COP defects having a size of 0.2 μm or more, oxygen precipitates at a density of 1×104 counts/cm2 or more, and BMDs (oxygen precipitates), where the ratio of the maximum to the minimum of the BMD density in the radial direction of the wafer is 3 or less, or a base material wafer grown at specific average temperature gradients within specific temperature ranges and specific cooling times for a single crystal at a nitrogen concentration of less than 1×1014 atoms/cm3, employing the Czochralski method. Moreover, a silicon epitaxial wafer having very small defects and a uniform BMD distribution in the inside can be formed by growing an epitaxial layer on the surface of either the first type base material wafer or the second type base material wafer. Both the silicon annealed wafer and the silicon epitaxial wafer greatly reduce the ra…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.