Clock control cell
US7274240B2 · kind B2 · utility
4Cited by
10References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2005 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Aug 25, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock control cell for production of an output clock signal from an input clock signal has a hold element and an output stage. The hold element is preceded by a signal level converter, with the signal level converter designed such that it converts an input signal to an output signal at predetermined signal levels, wherein the input clock signal is the input signal of the signal level converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.