Data processing system using multiple addressing modes for SIMD operations and method thereof
US7275148B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2003 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Dec 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various load and store instructions may be used to transfer multiple vector elements between registers in a register file and memory. A cnt parameter may be used to indicate a total number of elements to be transferred to or from memory, and an rcnt parameter may be used to indicate a maximum number of vector elements that may be transferred to or from a single register within a register file. Also, the instructions may use a variety of different addressing modes. The memory element size may be specified independently from the register element size such that source and destination sizes may differ within an instruction. With some instructions, a vector stream may be initiated and conditionally enqueued or dequeued. Truncation or rounding fields may be provided such that source data elements may be truncated or rounded when transferred. Also, source data elements may be sign- or unsigned-extended when transferred.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.