Method and apparatus for programmable sampling clock edge selection
US7275171B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2003 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Aug 22, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for transferring data across a clock domain boundary is described. In one embodiment, a fixed relationship between a faster clock and a slower clock is maintained in the process of phase alignment to allow great flexibility in allowable combinations of slower clock and faster clock frequencies. In one embodiment, an encoded edge select word is generated once at system initialization and used thereafter to select edges of the faster clock on which to sample data that comes from the clock domain of the slower clock. The value of the encoded edge select word is based, in part, on the fixed relationship between the faster clock and the slower clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.