Method, system and program product for autonomous error recovery for memory devices
US7275202B2 · kind B2 · utility
1Cited by
13References
16Claims
0Family size
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Key dates
| Filing date | Apr 7, 2004 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Jan 10, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An autonomous error recovery approach is provided for a memory device of a computing system. In response to a request for data, addressed data and associated control information of the memory device are tested for error. If error is detected, the contents of an addressed storage compartment of a second memory device are automatically retrieved and provided responsive to the request. As an example, the memory device may be a cache and the second memory device may be main memory for the computing system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.