Method for detecting bus contention from RTL description
US7277840B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 18, 2002 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Sep 1, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for efficiently detecting bus contention from a register transfer level (RTL) description is provided. A bus contention occurs if more than two components try to propagate data onto a bus at the same time. The provided method simulates possible input combinations and detects whether there is a possibility for a bus contention. In addition, the provided method is designed for testability, therefore using the method, the designer may identify contention that may exist in test mode at the RTL level of the design even when such conditions may not occur in system mode. The method provides the designer with the input combination as well as the RTL statement that caused the contention. The method detects the bus contention by simulating a small number of input combinations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.