Method and apparatus for responding to access errors in a data processing system
US7278062B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2003 |
| Grant date | Oct 2, 2007 |
| Priority date | — |
| Expiry date | Sep 19, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0751
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a data processing system (10) has a processor (14) coupled to a bus, where the data processing system (10) includes access error detection circuitry (26) and access error response circuitry (12), each coupled to the bus (58, 60). The access error detection circuitry detects an access error in the data processing system. The access error response circuitry initiates replacement of an existing value on the bus with a predetermined value when the access error has been detected, and continues to replace the existing value on the bus with the predetermined value when the access error has been detected and a persistent mode indicator has been asserted. The predetermined value may correspond to a predetermined instruction value (74) or a predetermined data value (76). In one embodiment, different values for the predetermined value may be used depending on the current operating mode of the data processing system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.