Method for fabricating a packaging device for semiconductor die and semiconductor device incorporating same
US7279355B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2003 |
| Grant date | Oct 9, 2007 |
| Priority date | — |
| Expiry date | Jun 27, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substantially planar substrate having opposed major surfaces is provided. The substrate includes a through hole that extends between the major surfaces. The through hole is filled with a conductive interconnecting element. A conductive mounting pad and a conductive connecting pad are formed on different ones of the major surfaces in electrical contact with the conductive interconnecting element. The packaging device formed by the method has a volume that is only a few times that of the semiconductor die and can be fabricated from materials that can withstand high-temperature die attach processes. The packaging device can be configured as the only packaging device used in the semiconductor device or as a submount for a semiconductor die that requires a high-temperature die attach process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.