Process for fabricating strained layers of silicon or of a silicon/germanium alloy
US7279404B2 · kind B2 · utility
1Cited by
7References
8Claims
0Family size
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Key dates
| Filing date | Jul 1, 2004 |
| Grant date | Oct 9, 2007 |
| Priority date | — |
| Expiry date | Jan 1, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/96
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating a strained layer of silicon or of a silicon/germanium alloy, includes:a) the formation of a layer (2) of silicon or of a silicon/germanium alloy on a layer (1) of a material having a modifiable lattice parameter; andb) the modification of the lattice parameter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.