Magnetic memory array architecture
US7283384B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2004 |
| Grant date | Oct 16, 2007 |
| Priority date | — |
| Expiry date | Oct 9, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An MRAM device is provided which includes an array of magnetic elements, a plurality of conductive lines configured to set magnetization states of the magnetic elements and circuitry configured to vary current applications along one or more of the conductive lines. In some cases, the MRAM device may additionally or alternatively include circuitry which is configured to terminate an application of current along one or more of the conductive lines before magnetization states of one or more magnetic elements selected for a write operation of the device are changed. In either case, a device is provided which includes an MRAM array and a first storage circuit comprising one or more magnetic elements, wherein the first storage circuit is configured to store parameter settings characterizing operations of the magnetic random access memory array within the magnetic elements. Methods for operating the devices provided herein are contemplated as well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.