Low tolerance polysilicon resistor for low temperature silicide processing
US7285472B2 · kind B2 · utility
1Cited by
15References
19Claims
0Family size
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Key dates
| Filing date | Jan 27, 2005 |
| Grant date | Oct 23, 2007 |
| Priority date | — |
| Expiry date | Mar 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/209
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various methods of fabricating a high precision, silicon-containing resistor in which the resistor is formed as a discrete device integrated in complementary metal oxide semiconductor (CMOS) processing utilizing low temperature silicidation are provided. In some embodiments, the Si-containing layer is implanted with a high dose of ions prior to activation. The activation can be performed by the deposition of a protective dielectric layer, or a separate activation anneal. In another embodiment, a highly doped in-situ Si-containing layer is used thus eliminating the need for implanting into the Si-containing layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.