Stack MCP
US7285864B2 · kind B2 · utility
13Cited by
7References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2004 |
| Grant date | Oct 23, 2007 |
| Priority date | — |
| Expiry date | Mar 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip having an adhesive layer previously formed on an element forming surface thereof and having a bump exposed from the surface of the adhesive layer is wire-bonded to a printed circuit board. Another semiconductor chip is stacked on the above semiconductor chip with the adhesive layer disposed therebetween and is wire-bonded to the printed circuit board by wire bonding. Likewise, at least one semiconductor chip is sequentially stacked on the thus attained semiconductor structure to form a stack MCP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.