Data replication in multiprocessor NUCA systems to reduce horizontal cache thrashing
US7287122B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2004 |
| Grant date | Oct 23, 2007 |
| Priority date | — |
| Expiry date | Oct 27, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/271
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of managing a distributed cache structure having separate cache banks, by detecting that a given cache line has been repeatedly accessed by two or more processors which share the cache, and replicating that cache line in at least two separate cache banks. The cache line is optimally replicated in a cache bank having the lowest latency with respect to the given accessing processor. A currently accessed line in a different cache bank can be exchanged with a cache line in the cache bank with the lowest latency, and another line in the cache bank with lowest latency is moved to the different cache bank prior to the currently accessed line being moved to the cache bank with the lowest latency. Further replication of the cache line can be disabled when two or more processors alternately write to the cache line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.