Xiaowei Shen
47Patents
11h-index
45Co-inventors
75Inventor score
Filing activity: Apr 27, 1999 → Aug 1, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6636950B1 | Computer architecture for shared memory access | Physics | 86 | Expired |
| US8131894B2 | Method and system for a sharing buffer | Physics | 54 | Active |
| US7392352B2 | Computer architecture for shared memory access | Physics | 38 | Expired |
| US7913041B2 | Cache reconfiguration based on analyzing one or more characteristics of run-time performance data or software hint | Emerging Cross-Sectional Technologies | 32 | Active |
| US7228388B2 | Enabling and disabling cache bypass using predicted cache line usage | Physics | 19 | Expired |
| US7634642B2 | Mechanism to save and restore cache and translation trace for fast context switch | Physics | 19 | Active |
| US7844778B2 | Intelligent cache replacement mechanism with varying and adaptive temporal residency requirements | Physics | 18 | Active |
| US6526481B1 | Adaptive cache coherence protocols | Physics | 18 | Expired |
| US7454573B2 | Cost-conscious pre-emptive cache line displacement and relocation mechanisms | Emerging Cross-Sectional Technologies | 14 | Expired |
| US7350034B2 | Architecture support of best-effort atomic transactions for multiprocessor systems | Physics | 13 | Active |
| US7478197B2 | Adaptive mechanisms for supplying volatile data copies in multiprocessor systems | Physics | 11 | Active |
| US7395407B2 | Mechanisms and methods for using data access patterns | Physics | 9 | Active |
| US7287122B2 | Data replication in multiprocessor NUCA systems to reduce horizontal cache thrashing | Physics | 9 | Expired |
| US7516306B2 | Computer program instruction architecture, system and process using partial ordering for adaptive response to memory latencies | Physics | 7 | Expired |
| US8140764B2 | System for reconfiguring cache memory having an access bit associated with a sector of a lower-level cache memory and a granularity bit associated with a sector of a higher-level cache memory | Emerging Cross-Sectional Technologies | 7 | Active |
| US7308538B2 | Scope-based cache coherence | Physics | 7 | Expired |
| US7437520B2 | Adaptive snoop-and-forward mechanisms for multiprocessor systems | Physics | 7 | Expired |
| US7568073B2 | Mechanisms and methods of cache coherence in network-based multiprocessor systems with ring-based snoop response collection | Physics | 6 | Active |
| US6757787B2 | Adaptive cache coherence protocols | Physics | 6 | Expired |
| US7457926B2 | Cache line replacement monitoring and profiling | Physics | 5 | Active |
| US7913048B2 | Data subscribe-and-publish mechanisms and methods for producer-consumer pre-fetch communications | Physics | 5 | Active |
| US7343454B2 | Methods to maintain triangle ordering of coherence messages | Physics | 5 | Expired |
| US7266642B2 | Cache residence prediction | Physics | 5 | Expired |
| US7856535B2 | Adaptive snoop-and-forward mechanisms for multiprocessor systems | Physics | 4 | Active |
| US8140828B2 | Handling transaction buffer overflow in multiprocessor by re-executing after waiting for peer processors to complete pending transactions and bypassing the buffer | Physics | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.