Method of forming interconnect having stacked alignment mark
US7288461B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2007 |
| Grant date | Oct 30, 2007 |
| Priority date | — |
| Expiry date | Jan 5, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A first film layer is formed over a substrate. A portion of the first film layer is removed to form a first alignment mark pattern and a first conductive layer is formed to fill the first alignment mark pattern to form a first alignment mark. A second film layer is formed and a portion of the second film layer is removed to form openings and to form a second alignment mark pattern. A second conductive layer is formed to fill the openings to form first conductive wires and to fill the second alignment mark pattern to form a second alignment mark. A third film layer and a hard mask layer are formed over the second film layer and a portion of the hard mask layer and the third film layer is removed to form via openings. A third conductive layer is formed in the via openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.