Patent · US Active

Dual-port memory array using shared write drivers and read sense amplifiers

US7289372B1 · kind B1 · utility

5Cited by

33References

20Claims

0Family size

Assignee

Altera Corporation · US

Inventors

Haiming Yu · San Jose, US
Wei Yee Koay · Kampung Bukit Kechil, MY

Key dates

Filing date	Aug 11, 2006
Grant date	Oct 30, 2007
Priority date	—
Expiry date	Aug 11, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG11C8/16
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Dual port memory blocks that have a reduced layout area are provided. The write drivers and sense amplifiers are shared between the dual ports to reduce the number of write drivers and sense amplifiers to save layout area. The write drivers for the two ports are used to write into all of the first port's bitlines. The sense amplifiers for the two ports are used to read from all of the second port's bitlines. A memory block can to support true dual port (TDP) and simple dual port (SDP) operation using substantially less write drivers and sense amplifiers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.