Core-level processor lockstepping
US7290169B2 · kind B2 · utility
22Cited by
18References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2004 |
| Grant date | Oct 30, 2007 |
| Priority date | — |
| Expiry date | Oct 12, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device is provided which includes a first microprocessor core to generate a first output signal; a second microprocessor core to generate a second output signal; a switching fabric having a first input/output port; and lockstep logic, coupled between the first input/output port of the switching fabric and the first and second microprocessor cores, to detect whether the first output signal differs from the second output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.