Hermetic wafer-level packaging for MEMS devices with low-temperature metallurgy
US7291513B2 · kind B2 · utility
14Cited by
4References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2004 |
| Grant date | Nov 6, 2007 |
| Priority date | — |
| Expiry date | Dec 7, 2024 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/019
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method is disclosed for making a wafer-level package for a plurality of MEMS devices. The method involves preparing a MEMS wafer and a lid wafer, each having respective bonding structures. The lid and MEMS wafers are then bonded together through the bonding structures. The wafers are substantially free of alkali metals and/or chlorine. IN a preferred embodiment, each wafer has a seed layer, a structural underlayer and an anti-oxidation layer. A solder layer, normally formed on the lid wafer, bonds the two wafers together.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.