Method for forming dual damascene with improved etch profiles
US7291553B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2005 |
| Grant date | Nov 6, 2007 |
| Priority date | — |
| Expiry date | May 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76813
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a dual damascene with improved profiles including providing a semiconductor process wafer including a dielectric insulating layer and an overlying hardmask layer; forming an uppermost layer of amorphous carbon substantially conformally over the hardmask layer; forming a trench line opening through at least the thickness of the amorphous carbon layer; forming a dual damascene opening comprising forming the trench line opening overlying a via opening pattern through a thickness of the hardmask layer and partially through a thickness of the dielectric insulating layer; and, filling the dual damascene opening with metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.