Patent · US Expired

Integrating time measurement circuit for a channel of a test card

US7292044B2 · kind B2 · utility

3Cited by
4References
18Claims
0Family size

Assignee

Inventor

Key dates

Filing dateNov 18, 2005
Grant dateNov 6, 2007
Priority date
Expiry dateNov 18, 2025

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/31709
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

In a first embodiment of the invention there is provided an electronic chip for use with an automatic testing equipment device testing a device under test. The device under test has a plurality of pins and the electronic chip is placed in a channel of a test card that is associated with one of the pins. An input signal is provided to a pin of the device under test and the resulting output is provided to the pin electronics for the channel of the test card. In most embodiments, the output signal is a voltage signal. One purpose for the electronic chip is to measure jitter based upon timing measurements performed by the electronic chip. Jitter measurements are particularly important for high-speed serial devices. The electronic chip includes an integrating time measurement circuit for receiving the input signal and producing an output signal including a timing measurement of at least a portion of the input signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.