Process for manufacturing an SOI wafer by annealing and oxidation of buried channels
US7294536B2 · kind B2 · utility
29Cited by
31References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2002 |
| Grant date | Nov 13, 2007 |
| Priority date | — |
| Expiry date | Mar 10, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/967
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.