Substrate bias voltage generating circuit for use in a semiconductor memory device
US7298199B2 · kind B2 · utility
2Cited by
11References
14Claims
0Family size
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Key dates
| Filing date | Dec 1, 2005 |
| Grant date | Nov 20, 2007 |
| Priority date | — |
| Expiry date | Dec 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/205
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A substrate voltage generating circuit for use in a semiconductor memory device is provided. The semiconductor memory device includes a charge pump for generating a substrate bias voltage in response to a clock signal; a first inverter type detector for detecting whether the substrate bias voltage reaches a target voltage; a second differential amplifier type detector for detecting whether the substrate bias voltage reaches the target voltage; and a driver for generating the clock signal in response to an output of one of the first and second detectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.