Patent · US Expired

Apparatus and method for precision trimming of integrated circuits using anti-fuse bond pads

US7301436B1 · kind B1 · utility

12Cited by
6References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 14, 2005
Grant dateNov 27, 2007
Priority date
Expiry dateMay 11, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/209
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An apparatus and method for using anti-fuse bond pads used to provide trimmed resistor values to the input terminals of circuits on an integrated circuit die. The apparatus and method comprises fabricating on a semiconductor integrated circuit a resistive network. The resistive network includes a first terminal, a second terminal and a resistor coupled between the two terminals. An anti-fuse bond pad and a trimming resistor are coupled between the first terminal and the second terminal. The trimming resistor is configured to be electrically coupled between the first terminal and the second terminal when a ball bond is formed on the anti-fuse bond pad. In various embodiments, a plurality of the anti-fuse bond pads and trimming resistors may be coupled between the two terminals. By selectively forming ball bonds on the plurality of anti-fuse bond pads, the resistance of the network can be selectively trimmed as needed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.