Package for electronic device, base substrate, electronic device and fabrication method thereof
US7304417B2 · kind B2 · utility
6Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2004 |
| Grant date | Dec 4, 2007 |
| Priority date | — |
| Expiry date | Jan 12, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A package for an electronic device includes a cavity that houses an electronic element, and grooves or holes formed on or in sidewalls that define the cavity. The grooves or holes extend from an open side of the cavity so as not to reach a bottom side of the package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.