Semiconductor memory device with uniform data access time
US7304877B2 · kind B2 · utility
2Cited by
3References
6Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 29, 2004 |
| Grant date | Dec 4, 2007 |
| Priority date | — |
| Expiry date | Dec 29, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes: a core region having a plurality of bank sets for outputting/storing a data in response to an inputted address, wherein each bank set includes one bank, one row address control unit and two column address control units; and a peripheral region having two pad groups, wherein two pad groups are respectively located at the opposite side of the core region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.