Phase change memories and/or methods of programming phase change memories using sequential reset control
US7304885B2 · kind B2 · utility
17Cited by
8References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2005 |
| Grant date | Dec 4, 2007 |
| Priority date | — |
| Expiry date | May 6, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Phase-change memory devices are provided that include a plurality of phase-change memory cells and a reset pulse generation circuit configured to output a plurality of sequential reset pulses. Each sequential reset pulse is output to a corresponding one of a plurality of reset lines. A plurality of write driver circuits are coupled to corresponding phase change memory cells and to a corresponding one of the reset lines of the reset pulse generation circuit. Methods of programming phase-change memory devices using sequential reset control signals are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.