High-voltage protection device and process
US7307319B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2004 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | May 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
A high-voltage circuit protection device includes a p-n junction in a semiconductor substrate that is spaced apart from a first electrode region by a diode region. A semiconductor layer overlies the diode region and is separated therefrom by a dielectric layer. A shallow-doped region resides in the diode region spaced apart from the p-n junction by a predetermined distance. The predetermined distance preferably ranges from about 0 to about 50% of the length of the diode region. A process for fabricating the high-voltage device includes forming the shallow-doped region using a threshold adjustment mask followed by formation of the first electrode region using the semiconductor layer in a self-aligned doping process. The shallow-doped region functions to reduce the clamping voltage of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.