Inventor · San Jose, CA, US

Nui Chong

20Patents
4h-index
35Co-inventors
59Inventor score

Filing activity: Jan 29, 2004 → Dec 15, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US10692837B1 Chip package assembly with modular core dice Electricity 30 Active
US8068004B1 Embedded inductor Emerging Cross-Sectional Technologies 14 Active
US7024646B2 Electrostatic discharge simulation Physics 7 Expired
US8194372B1 Systems and methods for electrostatic discharge protection Electricity 4 Active
US10629512B2 Integrated circuit die with in-chip heat sink Electricity 4 Active
US11054461B1 Test circuits for testing a die stack Electricity 4 Active
US7673270B1 Method and apparatus for compensating an integrated circuit layout for mechanical stress effects Physics 4 Active
US11119146B1 Testing of bonded wafers and structures for testing bonded wafers Electricity 3 Active
US7307319B1 High-voltage protection device and process Electricity 2 Expired
US11585854B1 Runtime measurement of process variations and supply voltage characteristics Electricity 1 Active
US11650249B1 Wafer testing and structures for wafer testing Physics 1 Active
US11164749B1 Warpage reduction Electricity 1 Active
US9177634B1 Two gate pitch FPGA memory cell Electricity 1 Active
US10043724B1 Using an integrated circuit die for multiple devices Electricity 0 Active
US10756711B1 Integrated circuit skew determination Electricity 0 Active
US12045469B2 Single event upset tolerant memory device Physics 0 Active
US11114344B1 IC die with dummy structures Electricity 0 Active
US10103139B2 Method and design of low sheet resistance MEOL resistors Electricity 0 Active
US10566050B1 Selectively disconnecting a memory cell from a power supply Physics 0 Active
US10379155B2 In-die transistor characterization in an IC Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.