Electronic device with guard ring
US7307329B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2004 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Jul 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/23
Abstract
An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.