Method and apparatus for capacitance multiplication within a phase locked loop
US7307460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2005 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Dec 12, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for capacitance multiplication using two charge pumps. A first charge pump (206) provides a current signal (I216) that is first conducted by a resistor (310) of an RC network and then split into three current paths prior to being conducted by a capacitor of the RC network. A first current path provides current to the capacitor (306) of the RC network from node (320). A second current path multiplies the current conducted by capacitor (306) by a first current multiplication factor. A third current path provides current to a second charge pump, which multiplies the current from the first charge pump by a second current multiplication factor that has a fractional value with an inverse magnitude sign relative to the first current multiplication factor. The combination of the second and third current paths effectively multiplies the capacitance magnitude of capacitor (306).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.