Ferroelectric memory and method for reading data from the ferroelectric memory
US7307866B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2005 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Jul 19, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ferroelectric memory of the present invention comprises: a plurality of normal cells, each of which includes a first ferroelectric capacitor for holding data and a first transistor connected to a first electrode of the first ferroelectric capacitor; a first bit line connected to the first transistor; a first bit line precharge circuit which is a switch circuit provided between the first bit line and a ground; and a word line connected to a gate of the first transistor. The word line is deactivated to disconnect the first ferroelectric capacitor from the first bit line before the first bit line precharge circuit is driven to discharge a potential of the first bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.