Method and apparatus for generating a boundary scan description and model
US7308656B1 · kind B1 · utility
10Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2005 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | May 30, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318591
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An aspect of the invention relates to a method, apparatus, and computer-readable medium for processing schematic data for an integrated circuit having a boundary scan architecture. A path through cells of the schematic data to generate a hierarchy of cells associated with a boundary scan chain. Each ignore cell in the hierarchy is pruned. Each short cell in the hierarchy is replaced with a direct connection. A shadow net is added to each net of the hierarchy. Each of the cells in the hierarchy is flattened in a bottom-up fashion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.