Semiconductor device and method for the fabrication thereof including grinding a major portion of the frame
US7309624B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2006 |
| Grant date | Dec 18, 2007 |
| Priority date | — |
| Expiry date | Jul 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.