Semiconductor device with multilayered metal pattern
US7312530B2 · kind B2 · utility
22Cited by
23References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2004 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | Sep 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01082
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first metal pattern, a second metal pattern formed on the second insulating film, and a third metal pattern formed in the second insulating film and connecting between the first metal pattern and the second metal pattern. The third metal pattern is a single continuous structure, and the principal orientation axes of crystals of a metal constituting the third metal pattern are parallel to the principal surface of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.