Dynamic sense amplifier for SRAM
US7313040B2 · kind B2 · utility
31Cited by
9References
29Claims
0Family size
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Key dates
| Filing date | May 3, 2006 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | May 3, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic sense amplifier for static random access memory (SRAM) is provided. The dynamic sense amplifier includes a pre-amplifier configured to amplify small input signals according to a first clock signal, and a main sense-latch coupled to the pre-amplifier, wherein the main sense-latch is configured to respond to the small input signals according to a second clock signal and a third clock signal, and wherein the dynamic sense amplifier is configured to consume substantially zero direct current power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.