Link power saving state
US7313712B2 · kind B2 · utility
49Cited by
6References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 21, 2004 |
| Grant date | Dec 25, 2007 |
| Priority date | — |
| Expiry date | Oct 27, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.