In situ hardmask pullback using an in situ plasma resist trim process
US7320927B2 · kind B2 · utility
5Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2003 |
| Grant date | Jan 22, 2008 |
| Priority date | — |
| Expiry date | Oct 20, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0188
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a process of manufacturing an isolation structure for use in a semiconductor device. The process includes forming an opening in a substrate through a patterned photoresist layer 225 and a hardmask layer 215 located over the substrate 205 with plasma, trimming the photoresist layer 225 with a plasma to create an exposed portion 215a of the hardmask layer 215, removing the exposed portion 215a with a plasma to create a trench guide opening 227, and creating a trench 230 through the trench guide opening 227 with a plasma.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.