Brian Smith
7Patents
4h-index
23Co-inventors
49Inventor score
Filing activity: May 23, 2003 → Aug 4, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9640396B2 | Spin-on spacer materials for double- and triple-patterning lithography | Electricity | 9 | Active |
| US6808942B1 | Method for controlling a critical dimension (CD) in an etch process | Electricity | 8 | Expired |
| US7244654B2 | Drive current improvement from recessed SiGe incorporation close to gate | Electricity | 5 | Expired |
| US7320927B2 | In situ hardmask pullback using an in situ plasma resist trim process | Electricity | 5 | Expired |
| US7300883B2 | Method for patterning sub-lithographic features in semiconductor manufacturing | Electricity | 4 | Expired |
| US8877430B2 | Methods of producing structures using a developer-soluble layer with multilayer technology | Emerging Cross-Sectional Technologies | 1 | Active |
| US7199011B2 | Method to reduce transistor gate to source/drain overlap capacitance by incorporation of carbon | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.