Stacked die package

US7326592B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Torsten Meyer · Mainschhorn, DE
• Harry Hedler · Germering, DE

Key dates

• Filing date: Apr 4, 2005
• Grant date: Feb 5, 2008
• Expiry date: Oct 22, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/19107
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A stacked die package includes a substrate or interposer board that includes a contact area on a top surface and landing pads surrounding the contact area. Solder pads are disposed on an opposite side of the substrate. The solder pads are electrically connected with the landing pads by inner board wiring. A reconstituted die, which includes a die surrounded by a frame, is mounted over the substrate. A top die is mounted over the reconstituted die. Both the reconstituted die and the top die are electrically connected to the substrate, e.g., by wire bonds.