Non-continuous encapsulation layer for MIM capacitor
US7326987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2005 |
| Grant date | Feb 5, 2008 |
| Priority date | — |
| Expiry date | Jul 16, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/688
Abstract
The present invention relates to metal-insulator-metal (MIM) capacitors and field effect transistors (FETs) formed on a semiconductor substrate. The FETs are formed in Front End of Line (FEOL) levels below the MIM capacitors which are formed in upper Back End of Line (BEOL) levels. An insulator layer is selectively formed to encapsulate at least a top plate of the MIM capacitor to protect the MIM capacitor from damage due to process steps such as, for example, reactive ion etching. By selective formation of the insulator layer on the MIM capacitor, openings in the inter-level dielectric layers are provided so that hydrogen and/or deuterium diffusion to the FETs can occur.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.