Network media access controller embedded in a programmable logic device—physical layer interface
US7330924B1 · kind B1 · utility
21Cited by
41References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2005 |
| Grant date | Feb 12, 2008 |
| Priority date | — |
| Expiry date | Jun 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0697
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An aspect of the invention is physical layer interface for a network interface including a plurality of input/output pins. The input/output pins are coupled for being multiplexed into a physical layer interface selected from among a Reduced Gigabit Media Independent Interface and a Gigabit Media Independent Interface. The input/output pins internal to a programmable logic device are for access to and from a processor block located in the programmable logic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.