Method for efficient virtualization of physical memory in a virtual-machine monitor
US7330942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2004 |
| Grant date | Feb 12, 2008 |
| Priority date | — |
| Expiry date | Dec 26, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present invention are directed to efficient provision, by a virtual-machine monitor, of a virtual, physical memory interface to guest operating systems and other programs and routines interfacing to a computer system through a virtual-machine interface. In one embodiment of the present invention, a virtual-machine monitor maintains control over a translation lookaside buffer (“TLB”), machine registers which control virtual memory translations, and a processor page table, providing each concurrently executing guest operating system with a guest-processor-page table and guest-physical memory-to-physical memory translations. In one embodiment, a virtual-machine monitor can rely on hardware virtual-address-translation mechanisms for the bulk of virtual-address translations needed during guest-operating-system execution, thus providing a guest-physical memory interface without introducing excessive overhead and inefficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.