Heat treatment jig for semiconductor wafer
US7331780B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 2005 |
| Grant date | Feb 19, 2008 |
| Priority date | — |
| Expiry date | Mar 21, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/68757
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A heat treatment jig by the invention comprising: the diameter of a disk-type structure being 60% or more of that of loaded semiconductor wafers; the thickness being 1.0 mm or more but 10 mm or less; the surface roughness Ra of 0.1 μm or more but 100 μm or less at a contacting surface with the wafers; and the surface planarity being specifically controlled in the concentric direction as well as in the diametrical direction, otherwise in place of above planarity, comprising a controlled maximum height in such a way that the maximum height is obtained by the flatness measurement at the multiple positions and the difference between said maximum height and the hypothetical-average-height-plane thus set is 50 μm or less, can reduce the slip generation due to the close adhesion of the wafers and the jig. Owing to this, even if the wafers having large tare weight should be heat-treated, the slip generation can be effectively prevented, thus enabling the jig to be widely used as the reliable heat treatment jig for semiconductor substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.