Integrated circuit memory system with dummy active region
US7332378B2 · kind B2 · utility
0Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2006 |
| Grant date | Feb 19, 2008 |
| Priority date | — |
| Expiry date | Jun 8, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
Abstract
An integrated circuit memory system including a substrate formed with equidistant spaced shallow trench isolation regions. Forming active regions and dummy active regions within the substrate between the equidistant spaced shallow trench isolation regions. Forming sources and drains within the active regions. Providing wordlines and source lines extending in a first direction and bitlines extending in a second direction. Forming contact regions over the dummy active regions for strapping the wordlines and the source lines to the bitlines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.