Method and apparatus for improving segmented memory addressing
US7334109B1 · kind B1 · utility
6Cited by
8References
10Claims
0Family size
Inventors
Key dates
| Filing date | Dec 30, 2004 |
| Grant date | Feb 19, 2008 |
| Priority date | — |
| Expiry date | Nov 16, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30101
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for breaking complex X86 segment operations and segmented addressing into explicit sub-operations so that they may be exposed to compiler or translator-based optimizations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.