Method of manufacturing multilayer wiring board
US7334324B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 24, 2004 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Mar 18, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/249994
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a, in order to accommodate the words range and to clarify the multilayer wiring board, grooves for forming a wiring circuit and via holes are formed in an insulating substrate formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C. and an amorphous polyetherimide resin as the primary constituents, a metallic foil is embedded within the grooves so that the surface of the foil protrudes to the surface of the insulating substrate, and a conductive material formed by curing a conductive paste is used for filling the via holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.