Method for fabricating copper-based interconnections for semiconductor device
US7335596B2 · kind B2 · utility
1Cited by
6References
6Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 22, 2005 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Mar 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76882
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Cu-based interconnections are fabricated in a semiconductor device by depositing a thin film of Cu or Cu alloy on a dielectric film by sputtering, the dielectric film having trenches and/or via holes at least one groove and being arranged on or above a substrate, and carrying out high temperature and high pressure treatment to thereby embed the Cu or Cu alloy into the trenches and/or via holes, in which the sputtering is carried out at a substrate temperature of −20° C. to 0° C. using, as a sputtering gas, a gaseous mixture containing hydrogen gas and an inert gas in a ratio in percentage of 5:95 to 20:80.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.