High speed memory modules utilizing on-pin capacitors
US7336098B2 · kind B2 · utility
6Cited by
4References
26Claims
0Family size
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Key dates
| Filing date | Jun 30, 2004 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Feb 20, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4086
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for producing memory modules having a plurality of branches connected to a memory bus, each branch containing at least one dynamic random access memory (DRAM) device or SDRAM device connected to the memory bus via at least one transmission signal (TS) line and/or at least one sub-transmission signal (STS) line. The memory modules include at least one branch containing a capacitor connected in parallel to the TS line or STS line and the DRAM device or SDRAM device. A computing system implementing the memory modules is also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.