Receiver circuit, in particular for a mobile radio
US7336717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2003 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Jun 28, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D1/2245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A radio receiver with a low intermediate frequency has a first mixer stage that can be fed with a modulated input signal and at whose output a complex intermediate frequency signal can be derived. Connected downstream of the first mixer stage is a limiting amplifier at whose output the intermediate frequency signal is present in a discrete-value and continuous-time fashion. A sampling device, for sampling the intermediate frequency signal, and a digital demodulator unit are connected to the output of this limiter. The demodulated input signal can be derived at the output of this digital demodulator unit. The present radio receiver requires a low chip area in conjunction with low power consumption, but offers a high sensitivity and accuracy based on the digitally implemented demodulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.